The present invention relates to a successive approximation type AD (analog-to-digital) converter, and more particularly to a successive approximation AD converter in which the AD conversion accuracy can be improved without increasing the number of resistors of a series resistor network for generating reference voltages for a comparator.
A microcomputer which is incorporated into an electronic apparatus, an industrial apparatus, or the like repeatedly performs the following control operation in order to control the operation of the apparatus. The microcomputer fetches a data indicating that the apparatus is in a certain state, performs a predetermined calculation process on the data, and causes the apparatus to sequentially operate by using a calculation data obtained as a result of the calculation.
In the microcomputer, the calculating process is performed in binary format, and hence there arises no problem when the calculating process is performed with fetching digital data from the external. By contrast, in the case where the calculating process is performed with fetching an analog signal, an AD converter for converting the analog signal into a digital signal most be incorporated between an input port of the microcomputer and the CPU (Central Processing Unit).
Analog-to-digital converters (hereafter called as AD converter) are classified into a batch approximation type and a successive approximation type. Hereinafter, a converter of the latter type or a successive approximation AD converter will be briefly described. When an analog signal is to be converted into an m-bit digital signal, for example, a successive approximation AD converter requires: a 2.sup.m number of resistors which are connected in series between a power source Vdd and the ground; a comparator which sequentially compares the analog voltage with node voltages of a specific m number of the series resistors; and an m-bit register which holds a comparison output of the comparator.
The successive approximation AD converter operates in the following manner. First, the analog signal is compared with a center voltage Vdd/2of the power source voltage Vdd and the ground. If the analog signal is higher than Vdd/2, "1" is held in the most significant bit of the register. Since it is found that the analog signal exists in (Vdd/2 to Vdd), the analog signal is then compared with a center voltage 3Vdd/4 of (Vdd/2 to Vdd). If the analog signal is lower than 3Vdd/4, for example, the comparison output "0", is held in the second significant bit of the register. Since it is found that the analog signal exists in (Vdd/2 to 3Vdd/4), the analog signal is further compared with a center voltage 5Vdd/8 of (Vdd/2 to 3Vdd/4). If the analog signal is higher than 5Vdd/8, for example, the comparison output "1" is held in the third-significant bit of the register. An operation similar to the above is repeated until the bit reaches the least significant bit of the register, whereby an m-hit digital value corresponding to the analog signal is held by the register. The microcomputer fetches the contents of the register and then performs a desired calculation process.
The case where the resolution of the successive approximation AD converter is to be changed to (m+n) bits in order to improve the AD conversion accuracy will be considered. In such a case, conventionally, a countermeasure is taken in which the number of resistors that are connected in series between the power source Vdd and the ground is increased to 2.sup.(m+n). When the resolution is to be changed from 8 bits to 10 bits, for example, the number of series resistors must be increased from 256 to 1,024.
When the number of resistors of a series resistor network is increased so as to improve the AD conversion accuracy, however, there arises a problem in that the chip area is largely widened and the production cost is raised.